Can a TTL LS device (low-power Schottky) serve as an input to a basic TTL device?
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A 74121 (One-shot) worked well as a reset to a counter device. There is an enable line using a 7400 NAND gate to allow or disallow the trigger to pass.
While duplicating the circuit, I found that all I have at the moment is a 74LS00. Are the outputs from the low-power Schottky devices compatible with a non-LS input?
simulate this circuit – Schematic created using CircuitLab
ttl schottky
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add a comment |
$begingroup$
A 74121 (One-shot) worked well as a reset to a counter device. There is an enable line using a 7400 NAND gate to allow or disallow the trigger to pass.
While duplicating the circuit, I found that all I have at the moment is a 74LS00. Are the outputs from the low-power Schottky devices compatible with a non-LS input?
simulate this circuit – Schematic created using CircuitLab
ttl schottky
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Either use a ground-grid or a ground plane.
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– analogsystemsrf
3 hours ago
add a comment |
$begingroup$
A 74121 (One-shot) worked well as a reset to a counter device. There is an enable line using a 7400 NAND gate to allow or disallow the trigger to pass.
While duplicating the circuit, I found that all I have at the moment is a 74LS00. Are the outputs from the low-power Schottky devices compatible with a non-LS input?
simulate this circuit – Schematic created using CircuitLab
ttl schottky
$endgroup$
A 74121 (One-shot) worked well as a reset to a counter device. There is an enable line using a 7400 NAND gate to allow or disallow the trigger to pass.
While duplicating the circuit, I found that all I have at the moment is a 74LS00. Are the outputs from the low-power Schottky devices compatible with a non-LS input?
simulate this circuit – Schematic created using CircuitLab
ttl schottky
ttl schottky
asked 6 hours ago
Rich ShealerRich Shealer
1086
1086
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Either use a ground-grid or a ground plane.
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– analogsystemsrf
3 hours ago
add a comment |
$begingroup$
Either use a ground-grid or a ground plane.
$endgroup$
– analogsystemsrf
3 hours ago
$begingroup$
Either use a ground-grid or a ground plane.
$endgroup$
– analogsystemsrf
3 hours ago
$begingroup$
Either use a ground-grid or a ground plane.
$endgroup$
– analogsystemsrf
3 hours ago
add a comment |
2 Answers
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$begingroup$
For the circuit as shown, yes. According to my late-70's databook, 74LS parts have an output current of 400$mu$A at 2.5V out, while 7400-series logic has an input current of 40$mu$A (the similar rating for 74LS logic is 20$mu$A). You certainly can't drive as many 74xx inputs from a 74LSxx output as you can from a 74xx output, but just as certainly you can drive one.
I was going to check the fan-out ratings of 74LSxx logic, but as I was turning to the paper book I realized that it didn't have a search bar, and desisted.
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1
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Agreed. 74LS was specifically designed for interface compatibility. Fanout is the only issue.
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– WhatRoughBeast
4 hours ago
add a comment |
$begingroup$
That will work as you have shown. But of course, there are many other options .
The 74121 already has 3 inputs two low and one hi, you seem to need two hi. 74LS can easily five units of 74’
TTL was always active low as it was the lowest power and lowest driver impedance mode for NPN driver switches, and this resulted is the fastest RC=T slew rate. Each and every TTL family had a fan out drive load of 10 units and most inputs were 1 unit in the same family. Thus the current drive was always asymmetric with the actual threshold voltage always being 2 diode or Vbe drops for every family, 74’,74F’,74S’,74LS’, and 74L’. Power consumption and speed is the tradeoff for uA/mA per “10 units for each family. Thus to use one family with another, there were standard conversion factors just like currency using fixed ratios for current yet all have the same voltage threshold.
When CMOS came along since they used almost no DC input current, and were forced to have matched symmetrical Nch/Pch drivers to minimize and limit shoot thru current the input threshold was always Vdc/2 but for some applications the choice to use 74HCT’ optimized the TTL asymmetrical Voltage/current levels for best noise immunity.
It is widely known by old-timer EE’s that the TTL asymmetric V/I and threshold provided optimal symmetric noise power immunity although every chip needed a decoupling cap vs 1 in 10 for the high voltage high impedance 4000 series <350 Ohms. Unlike 74ALVC’ which have 25 ohm impedance drivers which switch faster and draw more current but in much short time, benefit from a small cap 0.01 uF per IC if there are many IC contributing to conducted noise.
All 40 or so variations in logic families follow de facto standards for impedance , Vcc or Vdc range and minimum speed.
$endgroup$
add a comment |
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2 Answers
2
active
oldest
votes
2 Answers
2
active
oldest
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active
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$begingroup$
For the circuit as shown, yes. According to my late-70's databook, 74LS parts have an output current of 400$mu$A at 2.5V out, while 7400-series logic has an input current of 40$mu$A (the similar rating for 74LS logic is 20$mu$A). You certainly can't drive as many 74xx inputs from a 74LSxx output as you can from a 74xx output, but just as certainly you can drive one.
I was going to check the fan-out ratings of 74LSxx logic, but as I was turning to the paper book I realized that it didn't have a search bar, and desisted.
$endgroup$
1
$begingroup$
Agreed. 74LS was specifically designed for interface compatibility. Fanout is the only issue.
$endgroup$
– WhatRoughBeast
4 hours ago
add a comment |
$begingroup$
For the circuit as shown, yes. According to my late-70's databook, 74LS parts have an output current of 400$mu$A at 2.5V out, while 7400-series logic has an input current of 40$mu$A (the similar rating for 74LS logic is 20$mu$A). You certainly can't drive as many 74xx inputs from a 74LSxx output as you can from a 74xx output, but just as certainly you can drive one.
I was going to check the fan-out ratings of 74LSxx logic, but as I was turning to the paper book I realized that it didn't have a search bar, and desisted.
$endgroup$
1
$begingroup$
Agreed. 74LS was specifically designed for interface compatibility. Fanout is the only issue.
$endgroup$
– WhatRoughBeast
4 hours ago
add a comment |
$begingroup$
For the circuit as shown, yes. According to my late-70's databook, 74LS parts have an output current of 400$mu$A at 2.5V out, while 7400-series logic has an input current of 40$mu$A (the similar rating for 74LS logic is 20$mu$A). You certainly can't drive as many 74xx inputs from a 74LSxx output as you can from a 74xx output, but just as certainly you can drive one.
I was going to check the fan-out ratings of 74LSxx logic, but as I was turning to the paper book I realized that it didn't have a search bar, and desisted.
$endgroup$
For the circuit as shown, yes. According to my late-70's databook, 74LS parts have an output current of 400$mu$A at 2.5V out, while 7400-series logic has an input current of 40$mu$A (the similar rating for 74LS logic is 20$mu$A). You certainly can't drive as many 74xx inputs from a 74LSxx output as you can from a 74xx output, but just as certainly you can drive one.
I was going to check the fan-out ratings of 74LSxx logic, but as I was turning to the paper book I realized that it didn't have a search bar, and desisted.
answered 5 hours ago
TimWescottTimWescott
4,8661313
4,8661313
1
$begingroup$
Agreed. 74LS was specifically designed for interface compatibility. Fanout is the only issue.
$endgroup$
– WhatRoughBeast
4 hours ago
add a comment |
1
$begingroup$
Agreed. 74LS was specifically designed for interface compatibility. Fanout is the only issue.
$endgroup$
– WhatRoughBeast
4 hours ago
1
1
$begingroup$
Agreed. 74LS was specifically designed for interface compatibility. Fanout is the only issue.
$endgroup$
– WhatRoughBeast
4 hours ago
$begingroup$
Agreed. 74LS was specifically designed for interface compatibility. Fanout is the only issue.
$endgroup$
– WhatRoughBeast
4 hours ago
add a comment |
$begingroup$
That will work as you have shown. But of course, there are many other options .
The 74121 already has 3 inputs two low and one hi, you seem to need two hi. 74LS can easily five units of 74’
TTL was always active low as it was the lowest power and lowest driver impedance mode for NPN driver switches, and this resulted is the fastest RC=T slew rate. Each and every TTL family had a fan out drive load of 10 units and most inputs were 1 unit in the same family. Thus the current drive was always asymmetric with the actual threshold voltage always being 2 diode or Vbe drops for every family, 74’,74F’,74S’,74LS’, and 74L’. Power consumption and speed is the tradeoff for uA/mA per “10 units for each family. Thus to use one family with another, there were standard conversion factors just like currency using fixed ratios for current yet all have the same voltage threshold.
When CMOS came along since they used almost no DC input current, and were forced to have matched symmetrical Nch/Pch drivers to minimize and limit shoot thru current the input threshold was always Vdc/2 but for some applications the choice to use 74HCT’ optimized the TTL asymmetrical Voltage/current levels for best noise immunity.
It is widely known by old-timer EE’s that the TTL asymmetric V/I and threshold provided optimal symmetric noise power immunity although every chip needed a decoupling cap vs 1 in 10 for the high voltage high impedance 4000 series <350 Ohms. Unlike 74ALVC’ which have 25 ohm impedance drivers which switch faster and draw more current but in much short time, benefit from a small cap 0.01 uF per IC if there are many IC contributing to conducted noise.
All 40 or so variations in logic families follow de facto standards for impedance , Vcc or Vdc range and minimum speed.
$endgroup$
add a comment |
$begingroup$
That will work as you have shown. But of course, there are many other options .
The 74121 already has 3 inputs two low and one hi, you seem to need two hi. 74LS can easily five units of 74’
TTL was always active low as it was the lowest power and lowest driver impedance mode for NPN driver switches, and this resulted is the fastest RC=T slew rate. Each and every TTL family had a fan out drive load of 10 units and most inputs were 1 unit in the same family. Thus the current drive was always asymmetric with the actual threshold voltage always being 2 diode or Vbe drops for every family, 74’,74F’,74S’,74LS’, and 74L’. Power consumption and speed is the tradeoff for uA/mA per “10 units for each family. Thus to use one family with another, there were standard conversion factors just like currency using fixed ratios for current yet all have the same voltage threshold.
When CMOS came along since they used almost no DC input current, and were forced to have matched symmetrical Nch/Pch drivers to minimize and limit shoot thru current the input threshold was always Vdc/2 but for some applications the choice to use 74HCT’ optimized the TTL asymmetrical Voltage/current levels for best noise immunity.
It is widely known by old-timer EE’s that the TTL asymmetric V/I and threshold provided optimal symmetric noise power immunity although every chip needed a decoupling cap vs 1 in 10 for the high voltage high impedance 4000 series <350 Ohms. Unlike 74ALVC’ which have 25 ohm impedance drivers which switch faster and draw more current but in much short time, benefit from a small cap 0.01 uF per IC if there are many IC contributing to conducted noise.
All 40 or so variations in logic families follow de facto standards for impedance , Vcc or Vdc range and minimum speed.
$endgroup$
add a comment |
$begingroup$
That will work as you have shown. But of course, there are many other options .
The 74121 already has 3 inputs two low and one hi, you seem to need two hi. 74LS can easily five units of 74’
TTL was always active low as it was the lowest power and lowest driver impedance mode for NPN driver switches, and this resulted is the fastest RC=T slew rate. Each and every TTL family had a fan out drive load of 10 units and most inputs were 1 unit in the same family. Thus the current drive was always asymmetric with the actual threshold voltage always being 2 diode or Vbe drops for every family, 74’,74F’,74S’,74LS’, and 74L’. Power consumption and speed is the tradeoff for uA/mA per “10 units for each family. Thus to use one family with another, there were standard conversion factors just like currency using fixed ratios for current yet all have the same voltage threshold.
When CMOS came along since they used almost no DC input current, and were forced to have matched symmetrical Nch/Pch drivers to minimize and limit shoot thru current the input threshold was always Vdc/2 but for some applications the choice to use 74HCT’ optimized the TTL asymmetrical Voltage/current levels for best noise immunity.
It is widely known by old-timer EE’s that the TTL asymmetric V/I and threshold provided optimal symmetric noise power immunity although every chip needed a decoupling cap vs 1 in 10 for the high voltage high impedance 4000 series <350 Ohms. Unlike 74ALVC’ which have 25 ohm impedance drivers which switch faster and draw more current but in much short time, benefit from a small cap 0.01 uF per IC if there are many IC contributing to conducted noise.
All 40 or so variations in logic families follow de facto standards for impedance , Vcc or Vdc range and minimum speed.
$endgroup$
That will work as you have shown. But of course, there are many other options .
The 74121 already has 3 inputs two low and one hi, you seem to need two hi. 74LS can easily five units of 74’
TTL was always active low as it was the lowest power and lowest driver impedance mode for NPN driver switches, and this resulted is the fastest RC=T slew rate. Each and every TTL family had a fan out drive load of 10 units and most inputs were 1 unit in the same family. Thus the current drive was always asymmetric with the actual threshold voltage always being 2 diode or Vbe drops for every family, 74’,74F’,74S’,74LS’, and 74L’. Power consumption and speed is the tradeoff for uA/mA per “10 units for each family. Thus to use one family with another, there were standard conversion factors just like currency using fixed ratios for current yet all have the same voltage threshold.
When CMOS came along since they used almost no DC input current, and were forced to have matched symmetrical Nch/Pch drivers to minimize and limit shoot thru current the input threshold was always Vdc/2 but for some applications the choice to use 74HCT’ optimized the TTL asymmetrical Voltage/current levels for best noise immunity.
It is widely known by old-timer EE’s that the TTL asymmetric V/I and threshold provided optimal symmetric noise power immunity although every chip needed a decoupling cap vs 1 in 10 for the high voltage high impedance 4000 series <350 Ohms. Unlike 74ALVC’ which have 25 ohm impedance drivers which switch faster and draw more current but in much short time, benefit from a small cap 0.01 uF per IC if there are many IC contributing to conducted noise.
All 40 or so variations in logic families follow de facto standards for impedance , Vcc or Vdc range and minimum speed.
edited 50 mins ago
answered 5 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
66k22396
66k22396
add a comment |
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$begingroup$
Either use a ground-grid or a ground plane.
$endgroup$
– analogsystemsrf
3 hours ago